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Analyzer

When automatically generating a quantum circuit information about the synthesis process is needed. This fact is emphasized when approaching large circuits, where a simulation may not even be an option. The analyzer is a web app (dashboard) that allows the user to obtain information about a quantum circuit, primarily without the need to simulate it.

Run the code

The input to the analyzer tool is a quantum circuit. The analyzer supports OpenQASM, and Cirq as quantum circuits formats. In order to access the analyzer, there are three different options:

  • Classiq's python SDK: run the command analyze.Analyzer() and supply a quantum circuit
  • The VS-code classiq extension: open the extension command window (Cmd+Shift+P in macOS) and write Analyze quantum circuit

Each one of these three options will open the Analyzer's dashboard, there you will need to 'drag and drop' or choose the quantum circuit you wish to analyze. The circuit is analyzed in the backend. When the analysis process is done, the results will appear on the screen.

Interactive visualization using python SDK:

After synthesizing a circuit using the classiq platform python SDK, you can open an interactive visualization of the circuit containing data on each function. This is enabled using:

from classiq import Analyzer, ModelDesigner

m = ModelDesigner(max_width=8, max_depth=20)
circuit = m.synthesize()
Analyzer(circuit).analyzer_app()

Running this code will open an external web application with an interactive circuit representation. When hovering over a function, you will get some information about every function, such as function depth, function width, information about the registers, and more.

Understanding the results

Analysis results are organized in four different categories, circuit visualization, analysis data, hardware data, and logical data.

Circuit visualization

Circuit visualization provides a gate level image of the circuit, as well as a higher level interactive representation of the circuit showing all functions, templates, and patterns identified by a pattern recognition algorithm.

Circuit patterns, templates, and functions

The Classiq analyzer implements pattern matching and pattern recognition algorithms for analyzing a quantum circuit.

Pattern matching (Template matching)

The pattern matching algorithm searches the circuit for known patterns and presents these patterns as compact boxes in the quantum circuit representation. These known patterns are included in a pattern library that is regularly updated.

Pattern recognition

The pattern recognition algorithm is an unsupervised learning algorithm. When activated (on by default), the algorithms is searching for unknown patterns in the circuit that repeat themself more than two times. These patterns (and their repetitions) are presented to the user as a segment.

Analysis data

Contains information about the generated circuit and the compiled circuit characteristics, such as circuit depth, number of gates, and more (the circuit is decomposed to the default basis gates: u3 and cx).

Example for data about the above circuit:

{
  "depth": 8,
  "auxiliary_qubits": 50,
  "classical_bits": 1,
  "gates_count": 120,
  "multi_qubit_gates_count": 0,
  "non_entangled_subcircuits_count": 1,
  "native_gates": ["cx", "u3"]
}

Entanglement Analysis

The analyzer performs an analysis of the input circuit to provide an upper bound to the entanglement that may be created by running the circuit on any product input state. The analysis is based on the topology (i.e. connectivity map) of the circuit. More specifically, the entanglement measure used is the Schmidt rank width [1] of any quantum state that can be created by the circuit during the computation. The Schmidt rank width is defined via a sequence of partitions according to a sub-cubic tree structure (where every non-leaf node has degree 3) therefore the maximal entanglement of an n-qubit state is \(\lceil n/3 \rceil\). The analysis is based on bounding the Schmidt rank width of a graph state (\(\ket{G}\) - where G the underlying graph) which implements the analyzed circuit in the measurement-based quantum computation model. The Schmidt rank width of a graph state \(\ket{G}\) is equal to the rank width of \(G\) (\(rwd(G)\)) [1, 2] . The upper bound provided by the entanglement analysis relies on the result \(rwd(G) \leq tw(G) + 1\) where \(tw(G)\) is the treewidth of G [3] .

Note that this type of analysis relies solely on the topology of the circuit and ignores the actual gate operations applied to the qubits. Additionally, the treewidth algorithm used is an approximation based on the minimum fill-in heuristics [4] providing a result which be higher than the true treewidth. For these two reasons, actual entanglement in the circuit may be significantly lower than the upper bound shown. The entanglement analysis has a timeout of 90 seconds, outputting no result if a longer runtime is required.

Hardware analysis

Quantum circuits are more than just a beautiful image, they are meant to run on real quantum hardware in order to solve and supply interesting and new answers. The hardware analysis will supply the user with two main insights.

Qubit connection

The first will be the quantum circuit represented as a graph. Where each node corresponds to a qubit, the node color represents the number of connections this qubit has. A connection is two or more qubits gates. The edges between the nodes represent the strength of the connection - the thicker it is, the more connections these two qubits have.

connectivity

Hardware-circuit connection

This is a graph representation of the hardware along with the circuit. We allow the user to select interactively hardware from all the hardware providers (IBM Quantum, Amazon Braket, and Microsoft Azure) the desired hardware to run the circuit on. The analyzer will compile the circuit to the hardware, allowing the user to understand the hardware topology, which physical qubits the circuit will run on. This information is important if the user wants to execute the circuit on real quantum hardware. This will allow the user to understand which kind of modification one has to do to the circuit.

connectivity

Logical analysis

Additional information about the circuit.

Circuit heatmap

The heatmap is a shallower representation of the gate-level circuit image. It provides the user with some intuition about the activity in the circuit (analogy to the classic chip design heat maps). The different gates are divided into single or multi-qubit gates (for example two-qubit vs three-qubit gates will have a different color).

Gate count histogram

Histogram of the gates acts on each qubit.

histogram

References

[1] M. Van den Nest, W. Dur, G. Vidal, H. J. Briegel, "Classical simulation versus universality in measurement-based quantum computation", Phys. Rev. A 75, 012337 (2007).

[2] S. Oum, "Rank-width: Algorithmic and structural results", Lect. Notes Comput. Sci. 3787, 49 (2005)

[3] S. Oum, "Rank-width is Less than or Equal to Branch-Width", J. Graph Theory, 57 (3), 239-244 (2008)

[4] Hans L. Bodlaender. "Discovering Treewidth". Institute of Information and Computing Sciences, Utrecht University. Technical Report UU-CS-2005-018. http://www.cs.uu.nl