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Data analysis and graphs

The input to the analyzer tool is a quantum circuit in a OpenQasm or Cirq formats. The graphs and data are available via:

  • The python SDK
  • The VS-code Classiq extension: open the extension command window (Cmd+Shift+P in macOS) and write Analyze quantum circuit

The last two option will open a dashboard application; there you will need to 'drag and drop' or select the file with the quantum circuit you wish to analyze. When the analysis process is done, the results will appear on the screen.

Graphs and data

The analysis results in the dashboard application are organized in four different categories, circuit visualization, analysis data, hardware data, and logical data.

Circuit visualization

Circuit visualization provides a gate level image of the circuit, as well as a higher level interactive representation of the circuit showing all functions, templates, and patterns identified by a pattern recognition algorithm.

Circuit patterns, templates, and functions

The Classiq analyzer implements pattern matching and pattern recognition algorithms for analyzing a quantum circuit.

Pattern matching (Template matching)

The pattern matching algorithm searches the circuit for known patterns and presents these patterns as compact boxes in the quantum circuit representation. These known patterns are included in a pattern library that is regularly updated.

Pattern recognition

The pattern recognition algorithm is an unsupervised learning algorithm. When activated (on by default), the algorithms is searching for unknown patterns in the circuit that repeat themselves more than two times. These patterns (and their repetitions) are presented to the user as a segment.

Analysis data

Contains information about the generated circuit and the compiled circuit characteristics, such as circuit depth, number of gates, and more (the circuit is decomposed to the default basis gates: u3 and cx).

Example for data about the above circuit:

{
  "depth": 8,
  "auxiliary_qubits": 50,
  "classical_bits": 1,
  "gates_count": 120,
  "multi_qubit_gates_count": 0,
  "non_entangled_subcircuits_count": 1,
  "native_gates": ["cx", "u3"]
}

Entanglement Analysis

The analyzer performs an analysis of the input circuit to provide an upper bound to the entanglement that may be created by running the circuit on any product input state. The analysis is based on the topology (i.e. connectivity map) of the circuit. More specifically, the entanglement measure used is the Schmidt rank width [1] of any quantum state that can be created by the circuit during the computation. The Schmidt rank width is defined via a sequence of partitions according to a sub-cubic tree structure (where every non-leaf node has degree 3) therefore the maximal entanglement of an n-qubit state is \(\lceil n/3 \rceil\). The analysis is based on bounding the Schmidt rank width of a graph state (\(\ket{G}\) - where G the underlying graph) which implements the analyzed circuit in the measurement-based quantum computation model. The Schmidt rank width of a graph state \(\ket{G}\) is equal to the rank width of \(G\) (\(rwd(G)\)) [1, 2] . The upper bound provided by the entanglement analysis relies on the result \(rwd(G) \leq tw(G) + 1\) where \(tw(G)\) is the treewidth of G [3] .

Note that this type of analysis relies solely on the topology of the circuit and ignores the actual gate operations applied to the qubits. Additionally, the treewidth algorithm used is an approximation based on the minimum fill-in heuristics [4] providing a result which be higher than the true treewidth. For these two reasons, actual entanglement in the circuit may be significantly lower than the upper bound shown. The entanglement analysis has a timeout of 90 seconds, outputting no result if a longer runtime is required.

Hardware analysis

Quantum circuits are more than just a beautiful image, they are meant to run on real quantum hardware in order to solve and supply interesting and new answers. The hardware analysis will supply the user with two main insights.

Qubit connection

The first will be the quantum circuit represented as a graph. Where each node corresponds to a qubit, the node color represents the number of connections this qubit has. A connection is two or more qubits gates. The edges between the nodes represent the strength of the connection - the thicker it is, the more connections these two qubits have.

connectivity

Hardware-circuit connection

This is a graph representation of the hardware along with the circuit. We allow the user to select interactively hardware from all the hardware providers (IBM Quantum, Amazon Braket, and Microsoft Azure) to run the circuit on the desired hardware. The analyzer will compile the circuit to the hardware, allowing the user to understand the hardware topology, which physical qubits the circuit will run on. This information is important if the user wants to execute the circuit on real quantum hardware. This will allow the user to understand which kind of modification one has to do to the circuit.

connectivity

Logical analysis

Additional information about the circuit.

Circuit heatmap

The heatmap is a shallower representation of the gate-level circuit image. It provides the user with some intuition about the activity in the circuit (analogy to the classic chip design heat maps). The different gates are divided into single or multi-qubit gates (for example two-qubit vs three-qubit gates will have a different color).

Gate count histogram

Histogram of the gates acts on each qubit.

histogram

Graphs available via the Python SDK

Qubit connectivity:

from classiq import Analyzer, ModelDesigner

circuit = ModelDesigner(...).synthesize()
analyzer = Analyzer(circuit=circuit)
analyzer.plot_qubits_connectivity()

hardware comparison table:

The hardware comparison table compares between the transpiled circuits result on different hardware. The table included information about the circuit depth, number of multi qubit gate, and total number of gate.

from classiq import Analyzer, ModelDesigner

circuit = ModelDesigner(...).synthesize()

providers = ["IBM Quantum", "Azure Quantum", "AWS Braket"]
analyzer = Analyzer(circuit=circuit)
analyzer.get_hardware_comparison_table(providers=providers)
analyzer.plot_hardware_comparison_table()

The variable providers is a list of providers ("IBM Quantum", "Azure Quantum" and "AWS Braket"), where the table includes only the backends of providers that appear in the list, and the default is to use all the providers. The table has the following form:

comparison_table

There is an option to sort the table according to each one of the table properties using the dropdown button on the upper left side of the table. ```

Note

Using the default device/providers option (all) or comparing a large number of devices might take a long time, especially when analyzing large circuits. It is advised to compare a small number of devices when you are interested in analyzing large circuits.

re-synthesize the circuit:

The analyzer support hardware-aware re-synthesize. After synthesizing the circuit (without hardware specification) and comparing the fit of the circuit to the different devices, the user can re-synthesis the same model with a selected device:

provider = "IBM Quantum"
device = "washington"
analyzer.optimized_hardware_resynthesize(
    device=device,
    provider=provider,
)

device and provider are the names (type: strings) of the device and provider used to re-synthesize the circuit. Both can be taken from the comparison table. Alternatively, it is possible to perform hardware-aware re-synthesis optimized to a comparison property:

comparison_property = "depth"
analyzer.optimized_hardware_resynthesize(comparison_property=comparison_property)

This method performs the model re-synthesis with the device with the best score regarding the comparison_property selected. comparison_property can be one of the following:

  • 'depth'
  • 'multi qubit gate count'
  • 'total gate count'.

This method also accepts the variables devices and providers similar to get_hardware_comparison_table. If devices and providers are empty, the method will use the same devices from the table (if the table was generated)

Circuit heatmap:

from classiq import Analyzer, ModelDesigner

circuit = ModelDesigner(...).synthesize()
analyzer = Analyzer(circuit=circuit)
analyzer.plot_heatmap()

References

[1] M. Van den Nest, W. Dur, G. Vidal, H. J. Briegel, "Classical simulation versus universality in measurement-based quantum computation", Phys. Rev. A 75, 012337 (2007).

[2] S. Oum, "Rank-width: Algorithmic and structural results", Lect. Notes Comput. Sci. 3787, 49 (2005)

[3] S. Oum, "Rank-width is Less than or Equal to Branch-Width", J. Graph Theory, 57 (3), 239-244 (2008)

[4] Hans L. Bodlaender. "Discovering Treewidth". Institute of Information and Computing Sciences, Utrecht University. Technical Report UU-CS-2005-018. http://www.cs.uu.nl