> ## Documentation Index
> Fetch the complete documentation index at: https://docs.classiq.io/llms.txt
> Use this file to discover all available pages before exploring further.

# Route a Program

On error-corrected hardware you don't run gates directly on physical qubits. Each **logical
qubit** is a patch of many physical qubits protected by a surface code, and every logical
operation is carried out as a **lattice-surgery** procedure — patches merge, interact, and
split across repeated error-correction (syndrome) cycles to realize the gate. *Routing* is
the step that turns your logical circuit into this concrete, fault-tolerant execution plan:
`route_circuit` works out **where and when** each operation happens on the surface-code
lattice.

## What routing produces

The plan lives on a **3-D lattice**:

* the two **spatial** axes are the grid of surface-code patches — your logical qubits and the
  free space they use to interact;
* the third axis is **time**, measured in error-correction cycles.

Each operation becomes a space-time volume in this lattice. The
[visualization](/user-guide/error-correction/visualization) draws these as **cubes**
connected by **pipes** — the pipes are the channels along which patches merge and split to
carry out gates. **T gates** get special treatment: they consume a *magic state* produced by
a cultivation (distillation) routine, which routing schedules alongside the Clifford
operations.

The output is a `TopologicalProgram` — a complete, cycle-by-cycle layout of the circuit on
the lattice, together with summary statistics. Its size (how many patches, over how many
cycles) is the real cost of running the circuit fault-tolerantly, and it's what the later
stages visualize and turn into an error estimate. Finding a good layout is a hard
combinatorial problem; the engine solves it pragmatically to scale to circuits well beyond
what hand-routing allows.

<Tip>
  For an interactive, visual walkthrough of the routed lattice, see the
  [Fault Tolerance Engine overview](https://classiq-technologies.github.io/FTEngine/app/#routing).
</Tip>

## Routing a circuit

Routing expects a transpiled **Clifford+T** circuit — the gate set surface codes implement
natively. Build and synthesize a model as usual, then `export` it to OpenQASM with a
`FaultTolerantTranspilationConfig` so the circuit is decomposed into Clifford+T, and pass the
resulting QASM to `route_circuit`:

[comment]: SLOW

```python theme={null}
from classiq import (
    CX,
    H,
    Output,
    QArray,
    QBit,
    TargetLanguage,
    FaultTolerantTranspilationConfig,
    allocate,
    export,
    qfunc,
    synthesize,
)
from classiq.error_correction.routing import route_circuit


@qfunc
def main(qs: Output[QArray[QBit]]) -> None:
    allocate(2, qs)
    H(qs[0])
    CX(qs[0], qs[1])


qprog = synthesize(main)

clifford_t_qasm = export(
    qprog,
    target_language=TargetLanguage.QASM2,
    transpilation_config=FaultTolerantTranspilationConfig(
        clifford_t_approximation_error=1e-3
    ),
)

program = route_circuit(clifford_t_qasm)
```

The resulting `program` is a `TopologicalProgram`. Next, you can
[visualize it](/user-guide/error-correction/visualization) or
[estimate its total error](/user-guide/error-correction/total-error).