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Register Indexing and Slicing

The platform allows referring to specific qubits or qubit ranges of quantum registers similarly to Python sequences, such as lists and tuples.

The indexing is zero based. Referring to multiple consecutive indices, commonly referred to as slicing, is obtained by specifying the start (inclusive) and stop (exclusive) indices and using a colon separator, and slicing with step size different from 1 by two colon separators.


  • left_arg[5] refers to qubit 5 of register left_arg. Note: qubit 5 is the 6th qubit due to zero-based indexing.
  • left_arg[2:5] refers to qubits 2,3,4 (the slicing stop is exclusive)
  • left_arg[2:8:2] refers to qubits 2,4,6 (again, the slicing stop is exclusive)
  • left_arg[:-1] refers to all qubits except the last one

The example below generates an iQFT-CX-QFT circuit, where the value of the CX control bit is obtained from the most significant bit of the iQFT. This block is used in the modular addition circuit, which is the building block of Beauregard's Shor algorithm implementation [2].

In the Python SDK, the slicing is on the QReg object that connects to the input/output of the function. Additionally, the Python SDK allows concatenation and in-place assignment of QReg objects, as seen in the example.

  "logic_flow": [
        "function": "QFT",
        "name": "iqft",
        "function_params": {
            "num_qubits": 6,
            "inverse": true
        "outputs": {
            "OUT[:-1]": "lsb",
            "OUT[-1]": "msb_inv"
        "function": "CXGate",
        "name": "cx",
        "function_params": {},
        "inputs": {"CTRL": "msb_inv"},
        "outputs": {"CTRL": "msb"}
        "function": "QFT",
        "name": "qft",
        "function_params": {
            "num_qubits": 6
        "inputs": {
            "IN[:-1]": "lsb",
            "IN[-1]": "msb"
from classiq.interface.generator.qft import QFT
from classiq.interface.generator.standard_gates.controlled_standard_gates import CXGate

from classiq import ModelDesigner, QReg

model_designer = ModelDesigner()
qft_params_inverse = QFT(num_qubits=6, inverse=True)
qft_params = QFT(num_qubits=6)
cx_params = CXGate()

qreg = QReg(6)
msb = QReg(1)

model_designer.QFT(qft_params_inverse, call_name="iqft", out_wires={"OUT": qreg})
    in_wires={"CTRL": qreg[-1]},
    out_wires={"CTRL": msb},

# Alternatively, use the following syntax:
# qreg[-1] = msb
qreg = QReg.concat(qreg[:-1], msb)

    in_wires={"IN": qreg},

circuit = model_designer.synthesize()

The output circuit is shown below at the functional level.

 Slicing example