Transpilation is the process of optimizing an already-synthesized circuit and matching it to the desired hardware. It includes optimizations, such as combining a sequence of gates into an equivalent single gate, and transformations, such as qubit routing (i.e., applying swap gates in order to apply 2-qubit gates on partially connected hardware).
Classiq synthesis includes transpilation. However, the transformations applied to the circuit affect the hierarchical nature of the circuit. For example, the gates representing functions are decomposed to basis gates, and thus do not appear in the transpiled circuit. To visualize the hierarchical circuit in a meaningful way, the analyzer web application uses the non-transpiled circuit. On the other hand, when executing a circuit, it is preferable to use the transpiled circuit, because it is already optimized for the given hardware. Thus, the Executor uses the transpiled circuit.
The synthesis results include both circuits, in all output formats that you request. In addition, when using hardware-aware synthesis, the output also includes the circuit in the format required for running on the provided hardware.
In certain cases, the Classiq executor re-transpiles circuits immediately before execution. This is to minimize execution errors and make sure that all executed gates are compatible with the requested hardware.