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Upgrade Instructions

Interface Changes

  1. Change the circuit synthesis API to use an asynchronous model. Synthesizing the circuit now comprises two API calls: submitting a circuit synthesis job, and checking its status. After the synthesis, the result of the status check includes the synthesis results. All calls are made automatically when calling the ModelDesigner's synthesize function.

New Features

  1. Allow generating arithmetic expressions without uncomputation.
  2. Improve the connectivity graph in the Analyzer:
    • Transpile the circuitAutomatic automatically to all the supplied hardware.
    • Fix hardware layout.
    • Add hover box information: logical and physical qubit index.
    • Improve UI. See Analyzer: Qubit Connectivity.
  3. Add index and slice to function input and output qubits as part of the data flow definition, allowing a more flexible model design process. See Register Indexing and Slicing.
  4. Specify inputs and outputs when defining a composite function using the textual model. See Composite Functions: Defining the Logic Flow.
  5. Allow implementations with logarithmic depth and linear CX-count as well as a versatile number of auxiliary qubits in the Multi-Control-X function. See Multi-Control-X.
  6. Set the optimization parameter for the synthesis process. See Constraints: Optimization Parameter.
  7. Add support when analyzing randomized benchmarking (RB) results for multiple hardware:
    • Analyze the result.
    • Plot the different results versus hardware.
    • Plot the mean fidelity graph for a single RB experiment.