The circuit synthesis API has changed, and now uses an asynchronous model.
Synthesizing the circuit is now made of 2 API calls - submitting a circuit
synthesis job, and checking its status. Once the synthesis is done, the
result of the status check will include the synthesis results. All calls are
made automatically when calling the ModelDesigner's synthesize function.
Allow generating arithmetic expressions without uncomputation.
Connectivity graph improvements in the Analyzer:
Automatic transpilation of the circuit to all the supplied
Fix hardware layout
Hover box information: logical and physical qubit index.
Analyzer: Qubit Connectivity Function input and output qubits can now be indexed and sliced as part of the data
flow definition, allowing for a more flexible model design process:
Register Indexing and Slicing. Inputs and outputs must be specified when defining a composite function using the
Composite Functions: Defining the Logic Flow. The Multi-Control-X function now allows for implementations with logarithmic depth
and linear CX-count as well as a versatile number of auxiliary qubits:
Multi-Control-X. Setting the optimization parameter for the synthesis process is now possible:
Constraints: Optimization Parameter. Add support in analyzing randomized benchmarking (RB) results for multiple hardware:
Analyze the result
Plot the different results Vs. hardware
Plot the mean-fidelity graph for a single RB experiment
Back to top